1. Field of the Invention
The present invention relates to a nonvolatile semiconductor memory device (EEPROM) configured using electrically rewritable nonvolatile memory cells, and a method for operating the nonvolatile semiconductor memory device.
2. Description of the Related Art
A sense amplifier of a semiconductor memory such as a flash memory basically judges data stored in a memory cell by detecting existence or non-existence of a cell current or a magnitude of the cell current in accordance with the data stored in the memory cell. The sense amplifier is normally connected to a data line (or a bit line) to which a number of memory cells are connected. Sense methods implemented by such sense amplifiers are roughly divided into a voltage-detection type and a current-detection type.
A sense amplifier of a voltage-detection type precharges a bit line to a certain voltage while it is isolated from memory cells. The sense amplifier then discharges the bit line through a selected memory cell, and detects the discharge state of the bit line at a sense node connected to the bit line. At the time of data sensing, the bit line is isolated from the current source load, and the sense amplifier detects a bit line voltage that is dependent on cell data.
A sense amplifier of a current-detection type performs data sensing by supplying a read current to a memory cell via a bit line. The bit line voltage in this case is also dependent on cell data, and a data judgment at the sense node connected to the bit line is finally made by detecting the voltage difference based on the cell current difference.
The sense amplifier of a current-detection type can perform high-speed sensing by performing data sensing while supplying a read current to the memory cell via the corresponding bit line. The variation range of the bit line voltage due to cell data can be suppressed to a small value by a clamp transistor (pre-sense amplifier) that is provided between the bit line and the sense node. Accordingly, noise between bit lines can be tolerated. Thus, simultaneous read operations can be performed on all the bit lines. However, since the read operations are performed while a read current is being supplied to the memory cells, the voltage of the common source line provided in the memory cell array may rise from the ground potential.
When the voltage of the common source line varies, the cell current flowing through the selected memory cell also varies, and the data-reading accuracy of the sense amplifier becomes poorer. Therefore, in a conventional sense amplifier of a current-detection type, a read operation is divided into two cycles, so as to compensate for the decrease in the accuracy of the read operations (see Japanese National Publication No. 2006-500727). Where data is always read from a memory cell through two cycles, however, the time required for data reading becomes longer, and the sense operation cannot be performed at a higher speed.